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» Technology Mapping for Reliability Enhancement in Logic Synt...
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ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
14 years 7 months ago
Novel dual-Vth independent-gate FinFET circuits
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
Masoud Rostami, Kartik Mohanram
ICCAD
2006
IEEE
190views Hardware» more  ICCAD 2006»
15 years 6 months ago
Factor cuts
Enumeration of bounded size cuts is an important step in several logic synthesis algorithms such as technology mapping and re-writing. The standard algorithm does not scale beyond...
Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
ASPDAC
2007
ACM
124views Hardware» more  ASPDAC 2007»
15 years 1 months ago
BddCut: Towards Scalable Symbolic Cut Enumeration
While the covering algorithm has been perfected recently by the iterative approaches, such as DAOmap and IMap, its application has been limited to technology mapping. The main fact...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
EON
2008
14 years 11 months ago
Synthesizing the Mediator with jABC/ABC
Abstract. In this paper we show how to apply a tableau-based software composition technique to automatically generate the mediator's service logic. This uses an LTL planning (...
Tiziana Margaria
74
Voted
FPL
2003
Springer
113views Hardware» more  FPL 2003»
15 years 2 months ago
Data Dependent Circuit Design: A Case Study
Abstract. Data dependent circuits are logic circuits specialized to specific input data. They are smaller and faster than the original circuits, although they are not reusable and...
Shoji Yamamoto, Shuichi Ichikawa, Hiroshi Yamamoto