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» Temporal Analysis of Time Bounded Digital Systems
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IPPS
2002
IEEE
15 years 2 months ago
Overview of Hydra: A Concurrent Language for Synchronous Digital Circuit Design
Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit speci...
John O'Donnell
IWSOC
2003
IEEE
137views Hardware» more  IWSOC 2003»
15 years 3 months ago
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design
CAD tools support is essential in the success of today digital system design methodologies. Unfortunately, most of the classical design tools do not take into account the possibil...
Philippe Brunet, Camel Tanougast, Yves Berviller, ...
RTAS
2009
IEEE
15 years 4 months ago
Execution Strategies for PTIDES, a Programming Model for Distributed Embedded Systems
—We define a family of execution policies for a programming model called PTIDES (Programming Temporally Integrated Distributed Embedded Systems). A PTIDES application (factory a...
Jia Zou, Slobodan Matic, Edward A. Lee, Thomas Hui...
USENIX
1993
14 years 11 months ago
Measurement, Analysis, and Improvement of UDP/IP Throughput for the DECstation 5000
Networking software is a growing bottleneck in modern workstations, particularly for high throughput applications such as networked digital video. We measure various components of...
Jonathan Kay, Joseph Pasquale
ECRTS
2002
IEEE
15 years 2 months ago
Scope-Tree: A Program Representation for Symbolic Worst-Case Execution Time Analysis
Most WCET analysis techniques only provide an upper bound on the worst case execution time as a constant value. However, it often appears that the execution time of a piece of cod...
Antoine Colin, Guillem Bernat