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» Temporal Equilibrium Logic: A First Approach
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JSC
2010
100views more  JSC 2010»
14 years 4 months ago
An invariant-based approach to the verification of asynchronous parameterized networks
A uniform verification problem for parameterized systems is to determine whether a temporal property is satisfied for every instance of the system which is composed of an arbitrar...
Igor V. Konnov, Vladimir A. Zakharov
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 6 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
72
Voted
TACAS
2010
Springer
145views Algorithms» more  TACAS 2010»
15 years 4 months ago
Rational Synthesis
Abstract. Synthesis is the automated construction of a system from its specification. The system has to satisfy its specification in all possible environments. Modern systems oft...
Dana Fisman, Orna Kupferman, Yoad Lustig
88
Voted
IJCAI
1989
14 years 10 months ago
Time for Action: On the Relation Between Time, Knowledge and Action
We consider the role played by the concept of action in AI. We first briefly summarize the advantages and limitations of past approaches to taking the concept as primitive, as emb...
Yoav Shoham
72
Voted
TCS
2002
14 years 9 months ago
Automatic verification of real-time systems with discrete probability distributions
We consider the timed automata model of [3], which allows the analysis of realtime systems expressed in terms of quantitative timing constraints. Traditional approaches to real-ti...
Marta Z. Kwiatkowska, Gethin Norman, Roberto Segal...