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» Temporal Logic Verification Using Simulation
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ICSE
2008
IEEE-ACM
15 years 11 months ago
Security protocols, properties, and their monitoring
This paper examines the suitability and use of runtime verification as means for monitoring security protocols and their properties. In particular, we employ the runtime verificat...
Andreas Bauer 0002, Jan Jürjens
CSAC
2006
15 years 1 months ago
Toward a Pi-Calculus Based Verification Tool for Web Services Orchestrations
Abstract. Web services constitute a dynamic field of research about technologies of the Internet. WS-BPEL 2.0, is in the way for becoming a standard for defining Web services orche...
Faisal Abouzaid
DAC
1999
ACM
15 years 4 months ago
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
Mauro Chinosi, Roberto Zafalon, Carlo Guardiani
AMCS
2011
341views Mathematics» more  AMCS 2011»
14 years 6 months ago
FSP and FLTL framework for specification and verification of middle-agents
Agents are a useful abstraction frequently employed as a basic building block in modeling service, information and resource sharing in global environments. The connecting of reques...
Amelia Badica, Costin Badica
SIGSOFT
2007
ACM
16 years 12 days ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska