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» Temporal Logic Verification Using Simulation
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CAISE
2009
Springer
15 years 3 months ago
Data-Flow Anti-patterns: Discovering Data-Flow Errors in Workflows
Despite the abundance of analysis techniques to discover control-flow errors in workflow designs, there is hardly any support for w verification. Most techniques simply abstract fr...
Nikola Trcka, Wil M. P. van der Aalst, Natalia Sid...
DAC
2003
ACM
16 years 21 days ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
EUSFLAT
2003
117views Fuzzy Logic» more  EUSFLAT 2003»
15 years 1 months ago
Genetic fuzzy controllers: from simulated based learning to a real application
This work shows a stand-alone photovoltaic system application based on fuzzy logic controllers and genetic fuzzy systems. A hierarchical fuzzy controller has been designed that at...
Joaquín Cañada Bago, Jorge Aguilera,...
DAC
2006
ACM
16 years 21 days ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
DAC
2007
ACM
16 years 22 days ago
An Effective Guidance Strategy for Abstraction-Guided Simulation
tive Guidance Strategy for Abstraction-Guided Simulation Flavio M. De Paula Alan J. Hu Department of Computer Science, University of British Columbia, {depaulfm, ajh}@cs.ubc.ca D...
Flavio M. de Paula, Alan J. Hu