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» Temporal Logic Verification Using Simulation
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IJCAI
2003
15 years 1 months ago
Automatic Video Interpretation: A Novel Algorithm for Temporal Scenario Recognition
This paper presents a new scenario recognition algorithm for Video Interpretation. We represent a scenario model by specifying the characters involved in the scenario, the sub-sce...
Van-Thinh Vu, François Brémond, Moni...
111
Voted
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
14 years 12 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
FMICS
2010
Springer
14 years 9 months ago
A Study of Shared-Memory Mutual Exclusion Protocols Using CADP
Mutual exclusion protocols are an essential building block of concurrent systems: indeed, such a protocol is required whenever a shared resource has to be protected against concurr...
Radu Mateescu, Wendelin Serwe
CORR
2008
Springer
141views Education» more  CORR 2008»
14 years 11 months ago
Model checking memoryful linear-time logics over one-counter automata
We study complexity of the model-checking problems for LTL with registers (also known as freeze LTL and written LTL ) and for first-order logic with data equality tests (written F...
Stéphane Demri, Ranko Lazic, Arnaud Sangnie...
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 5 months ago
SoC design integration by using automatic interconnection rectification
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou