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» Temporal Logic Verification of Lock-Freedom
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EJWCN
2010
122views more  EJWCN 2010»
14 years 8 months ago
Using Model Checking for Analyzing Distributed Power Control Problems
Model checking (MC) is a formal verification technique which has known and still knows a resounding success in the computer science community. Realizing that the distributed power...
Thomas Brihaye, Marc Jungers, Samson Lasaulce, Nic...
ATAL
2010
Springer
15 years 1 months ago
Verifying agents with memory is harder than it seemed
ATL+ is a variant of alternating-time temporal logic that does not have the expressive power of full ATL , but still allows for expressing some natural properties of agents. It ha...
Nils Bulling, Wojciech Jamroga
ATAL
2010
Springer
15 years 2 months ago
Reasoning about strategies of multi-agent programs
Verification of multi-agent programs is a key problem in agent research and development. This paper focuses on multi-agent programs that consist of a finite set of BDI-based agent...
Mehdi Dastani, Wojciech Jamroga
RSP
2003
IEEE
15 years 6 months ago
Verification of Timing Properties in Rapid System Prototyping
This paper addresses the need for systematic verification of timing properties of real-time prototypes, which consist of timing constraints that must be satisfied at any given tim...
Doron Drusinsky, Man-tak Shing
97
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ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
15 years 6 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler