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DATE
2007
IEEE
83views Hardware» more  DATE 2007»
15 years 4 months ago
High-level test synthesis for delay fault testability
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
Sying-Jyan Wang, Tung-Hua Yeh
MIDDLEWARE
2007
Springer
15 years 4 months ago
Life cycle support for sensor network applications
Developing applications for sensor networks is a challenging task. Most programming systems narrowly focus on programming issues while ignoring that programming represents only a ...
Urs Bischoff, Gerd Kortuem
ACSD
2006
IEEE
105views Hardware» more  ACSD 2006»
15 years 4 months ago
Throughput Analysis of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for...
Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk...
EDCC
2005
Springer
15 years 4 months ago
Formal Safety Analysis of a Radio-Based Railroad Crossing Using Deductive Cause-Consequence Analysis (DCCA)
Abstract. In this paper we present the formal safety analysis of a radiobased railroad crossing. We use deductive cause-consequence analysis (DCCA) as analysis method. DCCA is a no...
Frank Ortmeier, Wolfgang Reif, Gerhard Schellhorn
HPCC
2005
Springer
15 years 3 months ago
Efficient SIMD Numerical Interpolation
This paper reports the results of SIMD implementation of a number of interpolation algorithms on common personal computers. These methods fit a curve on some given input points for...
Hossein Ahmadi, Maryam Moslemi Naeini, Hamid Sarba...