The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
Patrick Girard, Christian Landrault, Serge Pravoss...
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
: Conventionally, path delay tests are derived in a delay-independent manner, which causes most faults to be robustly untestable. Many non-robust tests are found but, in practice, ...
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
Michael Kishinevsky, Alex Kondratyev, Luciano Lava...