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ICCAD
2003
IEEE
151views Hardware» more  ICCAD 2003»
15 years 10 months ago
On Compacting Test Response Data Containing Unknown Values
The design of a test response compactor called a Block Compactor is given. Block Compactors belong to a new class of compactors called Finite Memory Compactors. Different from spa...
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Janu...
EMSOFT
2004
Springer
15 years 10 months ago
Loose synchronization of event-triggered networks for distribution of synchronous programs
Dataflow synchronous languages have attracted considerable interest in domains such as real-time control and hardware design. The potential benefits are promising: Discrete-time...
Jan Romberg, Andreas Bauer 0002
148
Voted
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
15 years 9 months ago
A Scalable Front-End Architecture for Fast Instruction Delivery
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
Glenn Reinman, Todd M. Austin, Brad Calder
BMCBI
2008
84views more  BMCBI 2008»
15 years 5 months ago
poolHiTS: A Shifted Transversal Design based pooling strategy for high-throughput drug screening
Background: A key goal of drug discovery is to increase the throughput of small molecule screens without sacrificing screening accuracy. High-throughput screening (HTS) in drug di...
Raghunandan M. Kainkaryam, Peter J. Woolf
SC
2009
ACM
15 years 10 months ago
A framework for core-level modeling and design of reconfigurable computing algorithms
Reconfigurable computing (RC) is rapidly becoming a vital technology for many applications, from high-performance computing to embedded systems. The inherent advantages of custom-...
Gongyu Wang, Greg Stitt, Herman Lam, Alan D. Georg...