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» Test Generation for Global Delay Faults
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SRDS
1993
IEEE
15 years 1 months ago
Bayesian Analysis for Fault Location in Homogeneous Distributed Systems
We propose a simple and practical probabilistic comparison-based model, employing multiple incomplete test concepts, for handling fault location in distributed systems using a Bay...
Yu Lo Cyrus Chang, Leslie C. Lander, Horng-Shing L...
SRDS
2008
IEEE
15 years 3 months ago
Systematic Structural Testing of Firewall Policies
Firewalls are the mainstay of enterprise security and the most widely adopted technology for protecting private networks. As the quality of protection provided by a firewall dire...
JeeHyun Hwang, Tao Xie, Fei Chen, Alex X. Liu
VTS
2008
IEEE
119views Hardware» more  VTS 2008»
15 years 3 months ago
Error Sequence Analysis
With increasing IC process variation and increased operating speed, it is more likely that even subtle defects will lead to the malfunctioning of a circuit. Various fault models, ...
Jaekwang Lee, Intaik Park, Edward J. McCluskey
DAC
2006
ACM
14 years 11 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
TCAD
2002
134views more  TCAD 2002»
14 years 9 months ago
DS-LFSR: a BIST TPG for low switching activity
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
Seongmoon Wang, Sandeep K. Gupta