77 search results - page 15 / 16 » Test Generation for Global Delay Faults |
TCAD
2011
13 years 1 months ago
2011
—This paper presents a hybrid automatic test pattern generation (ATPG) technique using the staggered launch-oncapture (LOC) scheme followed by the one-hot LOC scheme for testing ...
TC
2010
13 years 1 months ago
2010
Hybrid systems have emerged as an appropriate formalism to model embedded systems as they capture the theme of continuous dynamics with discrete control. Under this paradigm, distr...
ITC
2002
IEEE
13 years 11 months ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
ISCA
2011
IEEE
12 years 10 months ago
2011
IEEE
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
SERVICES
2010
13 years 7 months ago
2010
Today's ubiquitous internet access has opened new opportunities for mobile workers. By using portable devices, the workers are not only able to access their company's dat...