203 search results - page 40 / 41 » Test Pattern Generator for Delay Faults |
SERVICES
2010
14 years 11 months ago
2010
Today's ubiquitous internet access has opened new opportunities for mobile workers. By using portable devices, the workers are not only able to access their company's dat...
DT
2000
14 years 9 months ago
2000
Effective high-level ATPG tools are increasingly needed, as an essential element in the quest for reducing as much as possible the designer work on gate-level descriptions. We pro...
PADS
2006
ACM
15 years 3 months ago
2006
ACM
In this paper we present a detailed analysis of the performance of the Decision Theoretic Read Delay (DTRD) optimistic synchronisation algorithm for simulations of Multistems. We ...
ITC
1997
IEEE
15 years 1 months ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...
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DATE
1999
IEEE
15 years 1 months ago
1999
IEEE
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...