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86
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DATE
2007
IEEE
86views Hardware» more  DATE 2007»
15 years 7 months ago
Reduction of detected acceptable faults for yield improvement via error-tolerance
Error-tolerance is an innovative way to enhance the effective yield of IC products. Previously a test methodology based on error-rate estimation to support error-tolerance was pro...
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 7 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
74
Voted
ICSE
2008
IEEE-ACM
16 years 1 months ago
Incremental state-space exploration for programs with dynamically allocated data
We present a novel technique that speeds up state-space exploration (SSE) for evolving programs with dynamically allocated data. SSE is the essence of explicit-state model checkin...
Steven Lauterburg, Ahmed Sobeih, Darko Marinov, Ma...
108
Voted
SEKE
2005
Springer
15 years 6 months ago
Application of Design Combinatorial Theory to Scenario-Based Software Architecture Analysis
Design combinatorial theory for test-case generation has been used successfully in the past. It is useful in optimizing test cases as it is practically impossible to exhaustively t...
Chung-Horng Lung, Marzia Zaman
GD
2004
Springer
15 years 6 months ago
Clustering Cycles into Cycles of Clusters
In this paper we study simple families of clustered graphs that are highly unconnected. We start by studying 3-cluster cycles, which are clustered graphs such that the underlying ...
Pier Francesco Cortese, Giuseppe Di Battista, Maur...