248 search results - page 19 / 50 » Test exploration and validation using transaction level mode... |
124
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CODES
2009
IEEE
15 years 4 months ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
104
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AIEDU
2006
14 years 11 months ago
2006
Constructing a student model for language tutors is a challenging task. This paper describes using knowledge tracing to construct a student model of reading proficiency and validat...
115
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VLSID
2000
IEEE
15 years 3 months ago
2000
IEEE
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
ICDM
2002
IEEE
15 years 4 months ago
2002
IEEE
In this paper, we devise an efficient algorithm for clustering market-basket data. Different from those of the traditional data, the features of market-basket data are known to b...
ETS
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...