Sciweavers

5855 search results - page 77 / 1171
» Test generation and minimization with
Sort
View
ETS
2006
IEEE
119views Hardware» more  ETS 2006»
15 years 7 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
ISSRE
2006
IEEE
15 years 7 months ago
A Systematic Approach to Generate Inputs to Test UML Design Models
Practical model validation techniques are needed for model driven development (MDD) techniques to succeed. This paper presents an approach to generating inputs to test UML design ...
Trung T. Dinh-Trong, Sudipto Ghosh, Robert B. Fran...
ECOOP
2000
Springer
15 years 5 months ago
Automated Test Case Generation from Dynamic Models
We have recently shown how use cases can be systematically transformed into UML state charts considering all relevant information from a use case specification, including pre- and ...
Peter Fröhlich, Johannes Link
EVOW
1999
Springer
15 years 5 months ago
Test Pattern Generation Under Low Power Constraints
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
TACAS
2009
Springer
122views Algorithms» more  TACAS 2009»
15 years 8 months ago
Test Input Generation for Programs with Pointers
Software testing is an essential process to improve software quality in practice. Researchers have proposed several techniques to automate parts of this process. In particular, sym...
Dries Vanoverberghe, Nikolai Tillmann, Frank Piess...