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ITC
1992
IEEE
76views Hardware» more  ITC 1992»
15 years 5 months ago
A Small Test Generator for Large Designs
In this paper we report an automatic test pattern generator that can handle designs with one million gates or more on medium size workstations. Run times and success rates, i.e. t...
Sandip Kundu, Leendert M. Huisman, Indira Nair, Vi...
DATE
1997
IEEE
109views Hardware» more  DATE 1997»
15 years 5 months ago
Sequential circuit test generation using dynamic state traversal
A new method for state justi cation is proposed for sequential circuit test generation. The linear list of states dynamically obtained during the derivation of test vectors is use...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
IWANN
1995
Springer
15 years 5 months ago
Test Pattern Generation for Analog Circuits Using Neural Networks and Evolutive Algorithms
This paper presents a comparative analysis of neural networks, simulated annealing, and genetic algorithms in the determination of input patterns for testing analog circuits. The ...
José Luis Bernier, Juan J. Merelo Guerv&oac...
SNPD
2003
15 years 2 months ago
An Industrial Experience in Comparing Manual vs. Automatic Test Cases Generation
We present our experience in automatically deriving a detailed test case plan exclusively using the UML diagrams developed during the analysis and design phases. We consider in pa...
Francesca Basanieri, Pierpaolo Iani, Gaetano Lomba...
ICST
2009
IEEE
15 years 8 months ago
Generating Feasible Transition Paths for Testing from an Extended Finite State Machine (EFSM)
The problem of testing from an extended finite state machine (EFSM) can be expressed in terms of finding suitable paths through the EFSM and then deriving test data to follow the ...
Abdul Salam Kalaji, Robert M. Hierons, Stephen Swi...