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ISMVL
2005
IEEE
90views Hardware» more  ISMVL 2005»
15 years 7 months ago
Test Generation and Fault Localization for Quantum Circuits
It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wi...
Marek A. Perkowski, Jacob Biamonte, Martin Lukac
TCAD
2002
106views more  TCAD 2002»
15 years 1 months ago
Design of hierarchical cellular automata for on-chip test pattern generator
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaud...
VLSID
2009
IEEE
150views VLSI» more  VLSID 2009»
16 years 2 months ago
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis...
EVOW
2009
Springer
15 years 4 months ago
Testing Detector Parameterization Using Evolutionary Exploit Generation
Abstract. The testing of anomaly detectors is considered from the perspective of a Multi-objective Evolutionary Exploit Generator (EEG). Such a framework provides users of anomaly ...
Hilmi Günes Kayacik, A. Nur Zincir-Heywood, M...
EVOW
2001
Springer
15 years 6 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...