5855 search results - page 92 / 1171 » Test generation and minimization with |
TVLSI
2008
15 years 1 months ago
2008
The proposed work involves conversion of a given circuit model into a set of constraints and employing constraint solvers to generate tests for it. The method is demonstrated for ...
105
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DAC
2003
ACM
16 years 2 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
101
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ICCD
2004
IEEE
15 years 10 months ago
2004
IEEE
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
106
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ATS
2000
IEEE
15 years 5 months ago
2000
IEEE
We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
166
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JAVACARD
2000
15 years 5 months ago
2000
: Open-cards have introduced a new life cycle for smart card embedded applications. In the case of Java Card, they have raised the problem of embedded object-oriented applet valida...