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ET
1998
99views more  ET 1998»
15 years 1 months ago
A Behavior Model for Next Generation Test Systems
Defining information required by automatic test systems frequently involves a description of system behavior. To facilitate capturing the required behavior information in the cont...
Lee A. Shombert, John W. Sheppard
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
16 years 1 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 7 months ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
CORR
2004
Springer
100views Education» more  CORR 2004»
15 years 1 months ago
Test Collections for Patent-to-Patent Retrieval and Patent Map Generation in NTCIR-4 Workshop
This paper describes the Patent Retrieval Task in the Fourth NTCIR Workshop, and the test collections produced in this task. We perform the invalidity search task, in which each p...
Atsushi Fujii, Makoto Iwayama, Noriko Kando
EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
15 years 5 months ago
RESIST: a recursive test pattern generation algorithm for path delay faults
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
Karl Fuchs, Michael Pabst, Torsten Rössel