143 search results - page 2 / 29 » Test generation for designs with multiple clocks |
70
Voted
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
- Current industry trends in system design -- multiple clocks, clocks with arbitrary frequency ratios, multi-phased clocks, gated clocks, and level-sensitive latches, combined with...
ICCAD
2003
IEEE
15 years 2 months ago
2003
IEEE
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
DSD
2008
IEEE
15 years 4 months ago
2008
IEEE
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
FMICS
2008
Springer
14 years 11 months ago
2008
Springer
Lustre is a formal synchronous declarative language widely used for modeling and specifying safety-critical applications in the elds of avionics, transportation or energy productio...