502 search results - page 11 / 101 » Test pattern generation based on arithmetic operations |
126
Voted
VTS
2002
IEEE
15 years 6 months ago
2002
IEEE
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
122
Voted
DATE
2000
IEEE
15 years 6 months ago
2000
IEEE
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
103
Voted
MVA
2002
15 years 1 months ago
2002
This paper proposes a novel approach to constituting all the feasible ways of folding, based on crease infomation obtained from an image of illustrations of general origami drill ...
113
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VTS
1997
IEEE
15 years 6 months ago
1997
IEEE
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
106
Voted
ATS
2003
IEEE
15 years 7 months ago
2003
IEEE
Recent probabilistic test generation approaches have proven that detecting single stuck-at faults multiple times is effective at reducing the defective part level (DPL). Unfortuna...