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ICCAD
1997
IEEE
144views Hardware» more  ICCAD 1997»
15 years 6 months ago
Partial scan delay fault testing of asynchronous circuits
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
Michael Kishinevsky, Alex Kondratyev, Luciano Lava...
103
Voted
GI
2001
Springer
15 years 6 months ago
Testing Distributed Component Based Systems Using UML/OCL
We present a pragmatic approach using formal methods to increase the quality of distributed component based systems: Based on UML class diagrams annotated with OCL constraints, co...
Achim D. Brucker, Burkhart Wolff
197
Voted
PRL
2011
14 years 4 months ago
A Bayes-true data generator for evaluation of supervised and unsupervised learning methods
Benchmarking pattern recognition, machine learning and data mining methods commonly relies on real-world data sets. However, there are some disadvantages in using real-world data....
Janick V. Frasch, Aleksander Lodwich, Faisal Shafa...
134
Voted
EVOW
2001
Springer
15 years 6 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
FMICS
2008
Springer
15 years 3 months ago
Extending Structural Test Coverage Criteria for Lustre Programs with Multi-clock Operators
Lustre is a formal synchronous declarative language widely used for modeling and specifying safety-critical applications in the elds of avionics, transportation or energy productio...
Virginia Papailiopoulou, Laya Madani, Lydie du Bou...