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» Test pattern generation based on arithmetic operations
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ITC
2003
IEEE
327views Hardware» more  ITC 2003»
15 years 7 months ago
Case Study - Using STIL as Test Pattern Language
This paper describes the implementation of a test pattern language using STIL [1], the IEEE Standard Test Interface Language (1450-1999), in a next generation, open architecture A...
Daniel Fan, Steve Roehling, Rusty Carruth
VTS
1999
IEEE
71views Hardware» more  VTS 1999»
15 years 6 months ago
Test Generation for Ground Bounce in Internal Logic Circuitry
Ground bounce in internal circuitry is becoming an important design validation and test issue. In this paper a new circuit model for ground bounce in internal circuitry is propose...
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
ICCAD
2003
IEEE
135views Hardware» more  ICCAD 2003»
15 years 7 months ago
ATPG for Noise-Induced Switch Failures in Domino Logic
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
Rahul Kundu, R. D. (Shawn) Blanton
FATES
2004
Springer
15 years 7 months ago
A Test Generation Framework for quiescent Real-Time Systems
We present an extension of Tretmans’ theory and algorithm for test generation for input-output transition systems to real-time systems. Our treatment is based on an operational i...
Laura Brandán Briones, Ed Brinksma
TACAS
2007
Springer
124views Algorithms» more  TACAS 2007»
15 years 8 months ago
Deciding Bit-Vector Arithmetic with Abstraction
ion Randal E. Bryant1 , Daniel Kroening2 , Jo¨el Ouaknine3 , Sanjit A. Seshia4 , Ofer Strichman5 , and Bryan Brady4 1 Carnegie Mellon University, Pittsburgh 2 ETH Z¨urich 3 Oxfor...
Randal E. Bryant, Daniel Kroening, Joël Ouakn...