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» Test pattern generation based on arithmetic operations
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ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
15 years 8 months ago
SAT-based ATPG for Path Delay Faults in Sequential Circuits
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
Stephan Eggersglüß, Görschwin Fey,...
MCS
2010
Springer
15 years 10 days ago
Resolution-stationary random number generators
Besides speed and period length, the quality of uniform random number generators is usually assessed by measuring the uniformity of their point sets, formed by taking vectors of s...
François Panneton, Pierre L'Ecuyer
142
Voted
INTEGRATION
2006
102views more  INTEGRATION 2006»
15 years 1 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...
ICSM
2002
IEEE
15 years 6 months ago
Documenting Pattern Use in Java Programs
Design patterns are widely recognized as important software development methods. Their use as software understanding tools, though generally acknowledged has been scarcely explore...
Marco Torchiano
GBRPR
2007
Springer
15 years 8 months ago
Computing Homology Group Generators of Images Using Irregular Graph Pyramids
We introduce a method for computing homology groups and their generators of a 2D image, using a hierarchical structure i.e. irregular graph pyramid. Starting from an image, a hiera...
Samuel Peltier, Adrian Ion, Yll Haxhimusa, Walter ...