321 search results - page 3 / 65 » Test scheduling for core-based systems |
77
Voted
ITC
1997
IEEE
15 years 3 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
57
Voted
ATS
2003
IEEE
15 years 4 months ago
2003
IEEE
82
Voted
DFT
2003
IEEE
15 years 4 months ago
2003
IEEE
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
94
Voted
VLSI
2005
Springer
15 years 4 months ago
2005
Springer
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...
88
Voted
DATE
1999
IEEE
15 years 3 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...