624 search results - page 14 / 125 » Test set compaction algorithms for combinational circuits |
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
In this paper, we investigate dual applications for logic implications, which can provide both online error detection capabilities and improve the testing efficiency of an integr...
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EURODAC
1990
IEEE
15 years 1 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
TCAD
1998
14 years 9 months ago
1998
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
OOPSLA
2010
Springer
14 years 8 months ago
2010
Springer
Testing is among the most effective tools available for finding bugs. Still, we know of no automatic technique for generating test cases that expose bugs involving a combination ...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...