624 search results - page 23 / 125 » Test set compaction algorithms for combinational circuits |
137
Voted
DFT
2003
IEEE
15 years 9 months ago
2003
IEEE
Delay faults are an increasingly important test challenge. Traditional delay fault models are incomplete in that they only model a subset of delay defect behaviors. To solve this ...
146
Voted
TCAD
2008
15 years 3 months ago
2008
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
146
Voted
DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
In this paper we propose a new compression algorithm geared to reduce the time needed to test scan-based designs. Our scheme compresses the test vector set by encoding the bits th...
117
Voted
VLSID
2003
IEEE
16 years 4 months ago
2003
IEEE
Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound var...
141
click to vote
FUIN
2002
15 years 3 months ago
2002
The article describes a method combining two widely-used empirical approaches to learning from examples: rule induction and instance-based learning. In our algorithm (RIONA) decisi...