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» Test set compaction algorithms for combinational circuits
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ENGL
2008
170views more  ENGL 2008»
15 years 4 months ago
Design of Reversible/Quantum Ternary Comparator Circuits
Multiple-valued quantum circuits are promising choices for future quantum computing technology, since the multiple-valued quantum system is more compact than the corresponding bina...
Mozammel H. A. Khan
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
15 years 8 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
DATE
2005
IEEE
172views Hardware» more  DATE 2005»
15 years 9 months ago
Evolutionary Optimization in Code-Based Test Compression
We provide a general formulation for the code-based test compression problem with fixed-length input blocks and propose a solution approach based on Evolutionary Algorithms. In c...
Ilia Polian, Alejandro Czutro, Bernd Becker
VLSID
2002
IEEE
135views VLSI» more  VLSID 2002»
16 years 4 months ago
An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
Rupesh S. Shelar, Sachin S. Sapatnekar
COLT
2005
Springer
15 years 9 months ago
Learning Convex Combinations of Continuously Parameterized Basic Kernels
We study the problem of learning a kernel which minimizes a regularization error functional such as that used in regularization networks or support vector machines. We consider thi...
Andreas Argyriou, Charles A. Micchelli, Massimilia...