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» Test set compaction algorithms for combinational circuits
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DASFAA
2008
IEEE
150views Database» more  DASFAA 2008»
15 years 10 months ago
Approximate Clustering of Time Series Using Compact Model-Based Descriptions
Clustering time series is usually limited by the fact that the length of the time series has a significantly negative influence on the runtime. On the other hand, approximative c...
Hans-Peter Kriegel, Peer Kröger, Alexey Pryak...
VTS
1999
IEEE
71views Hardware» more  VTS 1999»
15 years 8 months ago
Test Generation for Ground Bounce in Internal Logic Circuitry
Ground bounce in internal circuitry is becoming an important design validation and test issue. In this paper a new circuit model for ground bounce in internal circuitry is propose...
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
128
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ICCAD
1995
IEEE
113views Hardware» more  ICCAD 1995»
15 years 7 months ago
Logic decomposition during technology mapping
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
Eric Lehman, Yosinori Watanabe, Joel Grodstein, He...
ECAL
1999
Springer
15 years 8 months ago
Evolution of Neural Controllers with Adaptive Synapses and Compact Genetic Encoding
Abstract. This paper is concerned with arti cial evolution of neurocontrollers with adaptive synapses for autonomous mobile robots. The method consists of encoding on the genotype ...
Dario Floreano, Joseba Urzelai
ICRA
2006
IEEE
99views Robotics» more  ICRA 2006»
15 years 10 months ago
Application of Set Membership Identification for Fault Detection of MEMS
- In this article, a set membership (SM) identification technique is tailored to detect faults in microelectromechanical systems. The SM-identifier estimates an orthotope which con...
Vasso Reppa, Anthony Tzes