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» Test set compaction algorithms for combinational circuits
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DAC
2007
ACM
15 years 8 months ago
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...
Trent McConaghy, Pieter Palmers, Georges G. E. Gie...
DFT
1997
IEEE
101views VLSI» more  DFT 1997»
15 years 8 months ago
Crosstalk Minimization in Three-Layer HVH Channel Routing
Crosstalk has become a major issue in VLSI design due to the high frequency, long interconnecting lines and small spacing between interconnects in today's integrated circuits...
Zhan Chen, Israel Koren
ISCAS
2006
IEEE
103views Hardware» more  ISCAS 2006»
15 years 10 months ago
A neural model for sonar-based navigation in obstacle fields
— The rapid control of sonar-guided vehicles through obstacle fields has been a goal of robotics for decades. How sensory data is represented strongly affects how obstacles and g...
Timothy K. Horiuchi
ICSE
2004
IEEE-ACM
16 years 4 months ago
Automated Generation of Test Programs from Closed Specifications of Classes and Test Cases
Most research on automated specification-based software testing has focused on the automated generation of test cases. Before a software system can be tested, it must be set up ac...
Wee Kheng Leow, Siau-Cheng Khoo, Yi Sun
EMNLP
2010
15 years 2 months ago
Combining Unsupervised and Supervised Alignments for MT: An Empirical Study
Word alignment plays a central role in statistical MT (SMT) since almost all SMT systems extract translation rules from word aligned parallel training data. While most SMT systems...
Jinxi Xu, Antti-Veikko I. Rosti