Sciweavers

8 search results - page 2 / 2
» Test-Pattern Grading and Pattern Selection for Small-Delay D...
Sort
View
ATS
2003
IEEE
105views Hardware» more  ATS 2003»
13 years 11 months ago
Minimizing Defective Part Level Using a Linear Programming-Based Optimal Test Selection Method
Recent probabilistic test generation approaches have proven that detecting single stuck-at faults multiple times is effective at reducing the defective part level (DPL). Unfortuna...
Yuxin Tian, Michael R. Grimaila, Weiping Shi, M. R...
ATS
2009
IEEE
117views Hardware» more  ATS 2009»
14 years 1 months ago
N-distinguishing Tests for Enhanced Defect Diagnosis
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
Gang Chen, Janusz Rajski, Sudhakar M. Reddy, Irith...
ET
2010
98views more  ET 2010»
13 years 5 months ago
MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...
Stephan Eggersglüß, Görschwin Fey,...