283 search results - page 41 / 57 » Testing CPU emulators |
104
click to vote
FPL
2009
Springer
15 years 4 months ago
2009
Springer
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
TIME
1999
IEEE
15 years 4 months ago
1999
IEEE
We present a new forward chaining planner, TALplanner, based on ideas developed by Bacchus [5] and Kabanza [11], where domain-dependent search control knowledge represented as tem...
SP
2010
IEEE
15 years 3 months ago
2010
IEEE
The computer systems security arms race between attackers and defenders has largely taken place in the domain of software systems, but as hardware complexity and design processes ...
CAINE
2003
15 years 1 months ago
2003
This paper discusses the development of a computational modeling and analysis toolkit to construct, animate, and biomechanically analyze sophisticated models of vertebrates. Users...
WISES
2004
15 years 1 months ago
2004
-- Debugging software that runs on highly integrated System-on-Chip devices is complicated because conventional debug tools (like traditional In-Circuit Emulators and Logic Analyze...