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AIS
2004
Springer
15 years 1 months ago
Timed I/O Test Sequences for Discrete Event Model Verification
Abstract. Model verification examines the correctness of a model implementation with respect to a model specification. While being described from model specification, implementatio...
Ki Jung Hong, Tag Gon Kim
SPLC
2010
14 years 8 months ago
Improving the Testing and Testability of Software Product Lines
Abstract. Software Product Line (SPL) engineering offers several advantages in the development of families of software products. There is still a need, however, for better underst...
Isis Cabral, Myra B. Cohen, Gregg Rothermel
ICSM
2003
IEEE
15 years 3 months ago
Testing with Respect to Concerns
Often the code regions that are assigned for a maintenance task do not follow the modularization of the original application program, but instead include parts of code from many d...
Amie L. Souter, David Shepherd, Lori L. Pollock
WCE
2007
14 years 11 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
VL
1999
IEEE
104views Visual Languages» more  VL 1999»
15 years 2 months ago
Pragmatic Graph Rewriting Modifications
We present new pragmatic constructs for easing programming in visual graph rewriting programming languages. The first is a modification to the rewriting process for nodes the host...
Peter J. Rodgers, Natalia Vidal