1610 search results - page 219 / 322 » Testing Patterns |
125
Voted
ICPR
2000
IEEE
16 years 3 months ago
2000
IEEE
This paper describes a new method to recover the sign of the local Gaussian curvature at each point on the visible surface of a 3-D object. Multiple (p > 3) shaded images are a...
104
click to vote
VLSID
2007
IEEE
16 years 2 months ago
2007
IEEE
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
97
Voted
APCCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract - This paper describes the design of a 12-bit digital-to-analog converter for a wireline modem chip implemented in a 0.13tm digital CMOS technology. Transistor-level simul...
101
click to vote
ISCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
— All-solution Boolean satisfiability (SAT) solvers are engines employed to find all the possible solutions to a SAT problem. Their applications are found throughout the EDA in...
108
Voted
ICCAD
2002
IEEE
15 years 7 months ago
2002
IEEE
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...