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154
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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 9 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
15 years 9 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
DAS
2008
Springer
15 years 6 months ago
Towards Whole-Book Recognition
We describe experimental results for unsupervised recognition of the textual contents of book-images using fully automatic mutual-entropy-based model adaptation. Each experiment s...
Pingping Xiu, Henry S. Baird
148
Voted
COLING
2008
15 years 6 months ago
A Hybrid Generative/Discriminative Framework to Train a Semantic Parser from an Un-annotated Corpus
We propose a hybrid generative/discriminative framework for semantic parsing which combines the hidden vector state (HVS) model and the hidden Markov support vector machines (HMSV...
Deyu Zhou, Yulan He
NIPS
2007
15 years 6 months ago
Fixing Max-Product: Convergent Message Passing Algorithms for MAP LP-Relaxations
We present a novel message passing algorithm for approximating the MAP problem in graphical models. The algorithm is similar in structure to max-product but unlike max-product it ...
Amir Globerson, Tommi Jaakkola