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CSREAESA
2009
15 years 6 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
VTS
2002
IEEE
138views Hardware» more  VTS 2002»
15 years 10 months ago
Test Power Reduction through Minimization of Scan Chain Transitions
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
COMPSAC
2009
IEEE
15 years 9 months ago
Towards a Theory for Testing Non-terminating Programs
Non-terminating programs are programs that legally perform unbounded computations. Though they are ubiquitous in real-world applications, testing these programs requires new theor...
Arnaud Gotlieb, Matthieu Petit
ET
1998
52views more  ET 1998»
15 years 4 months ago
Scalable Test Generators for High-Speed Datapath Circuits
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
Hussain Al-Asaad, John P. Hayes, Brian T. Murray
SASO
2008
IEEE
15 years 11 months ago
MyP2PWorld: Highly Reproducible Application-Level Emulation of P2P Systems
In this paper, we describe an application-level emulator for P2P systems with a special focus on high reproducibility. We achieve reproduciblity by taking control over the schedul...
Roberto Roverso, Mohammed Al-Aggan, Amgad Naiem, A...