Sciweavers

544 search results - page 10 / 109
» Testing concurrent programs using value schedules
Sort
View
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
15 years 3 months ago
Reuse-based test access and integrated test scheduling for network-on-chip
In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test dat...
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
ASPLOS
2008
ACM
14 years 11 months ago
Learning from mistakes: a comprehensive study on real world concurrency bug characteristics
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
Shan Lu, Soyeon Park, Eunsoo Seo, Yuanyuan Zhou
FASE
2009
Springer
15 years 4 months ago
HAVE: Detecting Atomicity Violations via Integrated Dynamic and Static Analysis
Abstract. The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Atomicity violation, which is ...
Qichang Chen, Liqiang Wang, Zijiang Yang, Scott D....
89
Voted
ASIAN
2004
Springer
150views Algorithms» more  ASIAN 2004»
15 years 3 months ago
Concurrent Constraint-Based Memory Machines: A Framework for Java Memory Models
A central problem in extending the von Neumann architecture to petaflop computers with millions of hardware threads and with a shared memory is defining the memory model [Lam79,...
Vijay A. Saraswat
86
Voted
CAV
2010
Springer
239views Hardware» more  CAV 2010»
14 years 11 months ago
Universal Causality Graphs: A Precise Happens-Before Model for Detecting Bugs in Concurrent Programs
Triggering errors in concurrent programs is a notoriously difficult task. A key reason for this is the behavioral complexity resulting from the large number of interleavings of op...
Vineet Kahlon, Chao Wang