321 search results - page 31 / 65 » Testing protocols modeled as FSMs with timing parameters |
117
Voted
DAC
2008
ACM
2008
ACM
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
16 years 1 months ago
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...
107
Voted
SENSYS
2005
ACM
15 years 6 months ago
2005
ACM
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
86
Voted
ASPDAC
2007
ACM
15 years 4 months ago
2007
ACM
- For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/So...
TCAD
2002
15 years 3 days ago
2002
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...
107
Voted
PADS
2006
ACM
15 years 6 months ago
2006
ACM
In this paper we present a detailed analysis of the performance of the Decision Theoretic Read Delay (DTRD) optimistic synchronisation algorithm for simulations of Multistems. We ...