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ISQED
2009
IEEE
94views Hardware» more  ISQED 2009»
15 years 4 months ago
Simultaneous buffer and interlayer via planning for 3D floorplanning
As technology advances, the interconnect delay among modules plays dominant role in chip performance. Buffer insertion, as a traditional approach to reduce wire delay in 2D ICs, i...
Xu He, Sheqin Dong, Yuchun Ma, Xianlong Hong
VRST
2009
ACM
15 years 4 months ago
3D object arrangement for novice users: the effectiveness of combining a first-person and a map view
Arranging 3D objects in Virtual Environments can be a complex, error prone and time consuming task, especially for users who are not familiar with interfaces for 3D navigation and...
Luca Chittaro, Roberto Ranon, Lucio Ieronutti
ISCIS
2005
Springer
15 years 3 months ago
Selection and Extraction of Patch Descriptors for 3D Face Recognition
In 3D face recognition systems, 3D facial shape information plays an important role. 3D face recognizers usually depend on point cloud representation of faces where faces are repre...
Berk Gökberk, Lale Akarun
SIGGRAPH
1999
ACM
15 years 2 months ago
A Morphable Model for the Synthesis of 3D Faces
In this paper, a new technique for modeling textured 3D faces is introduced. 3D faces can either be generated automatically from one or more photographs, or modeled directly throu...
Volker Blanz, Thomas Vetter
CVPR
2008
IEEE
14 years 10 months ago
Hallucinating 3D facial shapes
This paper focuses on hallucinating a facial shape from a low-resolution 3D facial shape. Firstly, we give a constrained conformal embedding of 3D shape in R2 , which establishes ...
Gang Pan, Song Han, Zhaohui Wu