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ESWS
2009
Springer
15 years 4 months ago
The Sile Model - A Semantic File System Infrastructure for the Desktop
With the increasing storage capacity of personal computing devices, the problems of information overload and information fragmentation become apparent on users’ desktops. For the...
Bernhard Schandl, Bernhard Haslhofer
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
15 years 1 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
FMCO
2007
Springer
15 years 3 months ago
COSTA: Design and Implementation of a Cost and Termination Analyzer for Java Bytecode
This paper describes the architecture of costa, an abstract interpretation based cost and termination analyzer for Java bytecode. The system receives as input a bytecode program, (...
Elvira Albert, Puri Arenas, Samir Genaim, German P...
SLIP
2005
ACM
15 years 3 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
ICIS
1998
14 years 11 months ago
An activity based costing approach to systems development and implementation
Many organizations are in the process of replacing legacy systems with large, integrated systems using new technological platforms. Accurate estimation of project resources requir...
Ginny Ooi, Christina Soh, Pui Mun Lee