1524 search results - page 293 / 305 » The Bandwidth Exchange Architecture |
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IEEEPACT
2006
IEEE
15 years 8 months ago
2006
IEEE
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
140
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IEEEPACT
2006
IEEE
15 years 8 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
112
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INFOCOM
2006
IEEE
15 years 8 months ago
2006
IEEE
- Rapid progress in deployment of national and regional optical network infrastructures holds the promise to provide abundant, inexpensive bandwidth to scientific communities. The ...
80
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MICRO
2006
IEEE
15 years 8 months ago
2006
IEEE
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
128
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ADBIS
2006
Springer
15 years 8 months ago
2006
Springer
While the cost per megabyte of magnetic disk storage is economical, organizations are alarmed by the increasing cost of managing storage. Storage Area Network (SAN) architectures ...