The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
According to the current profound development of multimedia and networking technologies, the way people communicate with, naturally, has evolved from a textoriented into a multime...
Y.-J. Kim, Tae-uk Choi, K. O. Jung, Y. K. Kang, Se...
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahu...
In RoboCup-98, sparrows team worked hard just to get both a simulation and a middle size robot team to work and to successfully participate in a major tournament. For this year, we...