632 search results - page 32 / 127 » The Basics of Performance-Monitoring Hardware |
ISCA
1997
IEEE
15 years 1 months ago
1997
IEEE
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, t...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
63
Voted
FCCM
2008
IEEE
15 years 4 months ago
2008
IEEE
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
––Digit-serial/parallel multipliers with improved throughput and latency are presented. The multipliers are based on unfolded bit-serial/parallel multipliers. The unfolding yie...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract— Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. We...