This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
We present a novel expansion based decision procedure for quantified boolean formulas (QBF) in conjunctive normal form (CNF). The basic idea is to resolve existentially quantifie...
The aim of this paper is to describe various types of synchronization phenomena discovered in our earlier studies of dynamics of Cellular Nonlinear Networks composed of locally in...
Antonio Andreescu, Zbigniew Galias, Maciej Ogorzal...
This paper describes the integration of analog, digital, and mixed-signal IC design in the undergraduate ECE curriculum at Lafayette College. This integration is being accomplishe...