— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
The traditional algorithm of Stockmeyer for area minimization of slicing
oorplans has time (and space) complexity O(n2 ) in the worst case, or O(nlogn) for balanced slicing. For ...
This paper present a novel interface synthesis approach based on a one-sided interface description. Whereas most other approaches consider interface synthesis as optimizing a chan...
This paper addresses the quantitative analysis of gossiping protocols. In contrast to existing approaches which are entirely based on the simulation of the individual nodes' ...
Thomas Krieger, Martin Riedl, Johann Schuster, Mar...
dards, language abstraction continues unabatrpretation of such high-level abstract languages requires high performance. The MP98 low-power, high-performance microprocessor architec...