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» The Basics of Performance-Monitoring Hardware
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ASPDAC
1995
ACM
108views Hardware» more  ASPDAC 1995»
15 years 1 months ago
Transistor reordering rules for power reduction in CMOS gates
— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang
ICCAD
1995
IEEE
90views Hardware» more  ICCAD 1995»
15 years 1 months ago
An optimal algorithm for area minimization of slicing floorplans
The traditional algorithm of Stockmeyer for area minimization of slicing oorplans has time (and space) complexity O(n2 ) in the worst case, or O(nlogn) for balanced slicing. For ...
Weiping Shi
ISSS
1995
IEEE
101views Hardware» more  ISSS 1995»
15 years 1 months ago
An approach to interface synthesis
This paper present a novel interface synthesis approach based on a one-sided interface description. Whereas most other approaches consider interface synthesis as optimizing a chan...
Jan Madsen, Bjarne Hald
SIGMETRICS
2008
ACM
14 years 9 months ago
A view-probability-matrix approach to the modelling of gossiping protocols
This paper addresses the quantitative analysis of gossiping protocols. In contrast to existing approaches which are entirely based on the simulation of the individual nodes' ...
Thomas Krieger, Martin Riedl, Johann Schuster, Mar...
MICRO
2000
IEEE
95views Hardware» more  MICRO 2000»
14 years 9 months ago
A Single-Chip Multiprocessor for Smart Terminals
dards, language abstraction continues unabatrpretation of such high-level abstract languages requires high performance. The MP98 low-power, high-performance microprocessor architec...
Masato Edahiro, Satoshi Matsushita, Masakazu Yamas...