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» The Basics of Performance-Monitoring Hardware
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IPPS
2008
IEEE
15 years 4 months ago
Design of steering vectors for dynamically reconfigurable architectures
An architectural framework is studied that can perform dynamic reconfiguration. A basic objective is to dynamically reconfigure the architecture so that its configuration is well ...
Nick A. Mould, Brian F. Veale, John K. Antonio, Mo...
ISCAS
2008
IEEE
191views Hardware» more  ISCAS 2008»
15 years 4 months ago
A novel approach for K-best MIMO detection and its VLSI implementation
— Since the complexity of MIMO detection algorithms is exponential, the K–best algorithm is often chosen for efficient VLSI implementation. This detection problem is often view...
Sudip Mondal, Khaled N. Salama, Wersame H. Ali
ARITH
2007
IEEE
15 years 4 months ago
A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design
The floating-point multiply-add fused (MAF) unit sets a new trend in the processor design to speed up floatingpoint performance in scientific and multimedia applications. This ...
Libo Huang, Li Shen, Kui Dai, Zhiying Wang
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 4 months ago
Tool-support for the analysis of hybrid systems and models
This paper introduces a method and tool-support for the automatic analysis and verification of hybrid and embedded control systems, whose continuous dynamics are often modelled u...
Andreas Bauer 0002, Markus Pister, Michael Tautsch...
DATE
2007
IEEE
172views Hardware» more  DATE 2007»
15 years 4 months ago
Diagnosis, modeling and tolerance of scan chain hold-time violations
Errors in timing closure process during the physical design stage may result in systematic silicon failures, such as scan chain hold time violations, which prohibit the test of ma...
Ozgur Sinanoglu, Philip Schremmer