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» The Basics of Performance-Monitoring Hardware
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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 4 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 4 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
DATE
2006
IEEE
96views Hardware» more  DATE 2006»
15 years 3 months ago
On the relation between simulation-based and SAT-based diagnosis
The problem of diagnosis – or locating the source of an error or fault – occurs in several areas of Computer Aided Design, such as dynamic verification, property checking, eq...
Görschwin Fey, Sean Safarpour, Andreas G. Ven...
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
15 years 3 months ago
Management of complex automotive communication networks
Automakers are still facing an increasing complexity in vehicle requirements with regard to their EE systems. This complexity is not only caused by innovations, which are being pr...
Thomas Weber
HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
15 years 3 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...