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HIPC
1999
Springer
15 years 4 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
EUROPAR
2005
Springer
15 years 5 months ago
Automatic Tuning of PDGEMM Towards Optimal Performance
Sophisticated parallel matrix multiplication algorithms like PDGEMM exhibit a complex structure and can be controlled by a large set of parameters including blocking factors and bl...
Sascha Hunold, Thomas Rauber
SIGMETRICS
2005
ACM
110views Hardware» more  SIGMETRICS 2005»
15 years 5 months ago
Empirical evaluation of multi-level buffer cache collaboration for storage systems
To bridge the increasing processor-disk performance gap, buffer caches are used in both storage clients (e.g. database systems) and storage servers to reduce the number of slow di...
Zhifeng Chen, Yan Zhang, Yuanyuan Zhou, Heidi Scot...
SIGCOMM
2009
ACM
15 years 6 months ago
Hash, don't cache: fast packet forwarding for enterprise edge routers
As forwarding tables and link speeds continue to grow, fast packet forwarding becomes increasingly challenging for enterprise edge routers. Simply building routers with ever large...
Minlan Yu, Jennifer Rexford
MICRO
2003
IEEE
135views Hardware» more  MICRO 2003»
15 years 5 months ago
Generational Cache Management of Code Traces in Dynamic Optimization Systems
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
Kim M. Hazelwood, Michael D. Smith