535 search results - page 47 / 107 » The Cache Performance and Optimizations of Blocked Algorithm... |
ISCA
1996
IEEE
15 years 4 months ago
1996
IEEE
Historically, processor accesses to memory-mapped device registers have been marked uncachable to insure their visibility to the device. The ubiquity of snooping cache coherence, ...
ICS
2005
Tsinghua U.
15 years 5 months ago
2005
Tsinghua U.
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
161
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PAM
2011
Springer
14 years 2 months ago
2011
Springer
Several important network applications cannot easily scale to higher data rates without requiring focusing just on the large traffic flows. Recent works have discussed algorithmic...
124
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MSS
2003
IEEE
15 years 5 months ago
2003
IEEE
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...
124
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CASES
2007
ACM
15 years 3 months ago
2007
ACM
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...